entity meinausgangsschaltnetz is port ( a, b, x: in bit; y: out bit ); end; entity meinuebergangsschaltnetz is port ( a, b: inout bit; x: in bit ); end; architecture verhalten of meinausgangsschaltnetz is begin y <= (a xor a) or (a or a); end; architecture verhalten of meinuebergangsschaltnetz is begin b <= (not b and not a and x) or (b and not a and not x) or (b and a and x); a <= (a and not x) or (b and not x) or (b and a); end; architecture verhaltendnf of meinuebergangsschaltnetz is begin b <= (b or a or not x) and (not b or a or x) and (not b or not a or not x); a <= (not a or x) and (not b or x) and (not b or not a); end; architecture verhaltendnf of meinausgangsschaltnetz is begin y <= (a xor a) or (a or a); end;