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#!/bin/bash echo "Hallo Welt"
david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash hello.sh Hallo Welt david@laptop-peaq:~/bash-2024-02-18/20240218\$
#!/bin/bash
i=0
while [ \$i -lt 10 ]
do
echo "Hallo zum \$((\$i+1))."
i=\$((\$i+1))
done
david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash while.sh Hallo zum 1. Hallo zum 2. Hallo zum 3. Hallo zum 4. Hallo zum 5. Hallo zum 6. Hallo zum 7. Hallo zum 8. Hallo zum 9. Hallo zum 10. david@laptop-peaq:~/bash-2024-02-18/20240218\$
#!/bin/bash
if [[ "\$1" == "David" \&\& "\$2" == "Vajda" ]]
then
echo "Das koennte ich sein"
elif [ "\$1" == "David" ]
then
echo "Das ist zumindest mein Vorname"
elif [ "\$1" == "Vajda" ]
then
echo "Vom Nachnamen stimmt es"
else
echo "Das bin sicher nicht ich"
fi
david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash ifthenelse.sh David Vajda Das koennte ich sein david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash ifthenelse.sh David Das ist zumindest mein Vorname david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash ifthenelse.sh Vajda Vom Nachnamen stimmt es david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash ifthenelse.sh Max Mustermann Das bin sicher nicht ich david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash ifthenelse.sh Max Das bin sicher nicht ich david@laptop-peaq:~/bash-2024-02-18/20240218\$
#!/bin/bash
a=(Hallo Welt sagt David Vajda)
a+=(Aber noch manches mehr)
i=0
while [ \$i -lt 9 ]
do
echo "\${a[\$i]}"
i=\$((\$i+1))
done
for s in "\${a[@]}"
do
echo "\$s"
done
david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash array.sh Hallo Welt sagt David Vajda Aber noch manches mehr Hallo Welt sagt David Vajda Aber noch manches mehr david@laptop-peaq:~/bash-2024-02-18/20240218\$
#!/bin/bash
l=\$(ls)
for s in \$l
do
echo "\$s"
done
david@laptop-peaq:~/bash-2024-02-18/20240218\$ /bin/bash cmd.sh array.sh cmd.sh hello.sh ifthenelse.sh while.sh david@laptop-peaq:~/bash-2024-02-18/20240218\$
Und jetzt ein Quine Mc Cluskey und VHDL Code
0 0 0 0 0 1
1 0 0 0 1 1
2 0 0 1 0 0
3 0 0 1 1 1
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 0
9 1 0 0 1 1
10 1 0 1 0 0
11 1 0 1 1 0
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
0 0 0 0 0 1
1 0 0 0 1 1
3 0 0 1 1 1
7 0 1 1 1 1
9 1 0 0 1 1
12 1 1 0 0 1
13 1 1 0 1 1
14 1 1 1 0 1
15 1 1 1 1 1
Gruppe 0:
0 0 0 0 0 1
Gruppe 1:
1 0 0 0 1 1
Gruppe 2:
3 0 0 1 1 1
9 1 0 0 1 1
12 1 1 0 0 1
Gruppe 3:
7 0 1 1 1 1
13 1 1 0 1 1
14 1 1 1 0 1
Gruppe 4:
15 1 1 1 1 1
0:1 0 0 0 -
1:3 0 0 - 1
1:9 - 0 0 1
3:7 0 - 1 1
9:13 1 - 0 1
12:13 1 1 0 -
12:14 1 1 - 0
7:15 - 1 1 1
13:15 1 1 - 1
14:15 1 1 1 -
0:1 0 0 0 -
12:13 1 1 0 -
14:15 1 1 1 -
1:3 0 0 - 1
12:14 1 1 - 0
13:15 1 1 - 1
3:7 0 - 1 1
9:13 1 - 0 1
7:15 - 1 1 1
1:9 - 0 0 1
Gruppe 0:
0:1 0 0 0 -
Gruppe 2:
12:13 1 1 0 -
Gruppe 3:
14:15 1 1 1 -
Gruppe 1:
1:3 0 0 - 1
Gruppe 2:
12:14 1 1 - 0
Gruppe 3:
13:15 1 1 - 1
Gruppe 2:
3:7 0 - 1 1
9:13 1 - 0 1
Gruppe 3:
7:15 - 1 1 1
Gruppe 1:
1:9 - 0 0 1
Gruppe 0:
0:1 0 0 0 -
Gruppe 2:
12:13 1 1 0 -
Gruppe 3:
14:15 1 1 1 -
0:1 0 0 0 -
12:13:14:15 1 1 - -
Gruppe 1:
1:3 0 0 - 1
Gruppe 2:
12:14 1 1 - 0
Gruppe 3:
13:15 1 1 - 1
1:3 0 0 - 1
12:14:13:15 1 1 - -
Gruppe 2:
3:7 0 - 1 1
9:13 1 - 0 1
3:7 0 - 1 1
9:13 1 - 0 1
Gruppe 3:
7:15 - 1 1 1
Gruppe 1:
1:9 - 0 0 1
7:15 - 1 1 1
1:9 - 0 0 1
0:1 0 0 0 -
12:13:14:15 1 1 - -
1:3 0 0 - 1
3:7 0 - 1 1
9:13 1 - 0 1
7:15 - 1 1 1
1:9 - 0 0 1
0 1 3 7 9 12 13 14 15
0:1 * *
12:13:14:15 * * * *
1:3 * *
3:7 * *
9:13 * *
7:15 * *
1:9 * *
0 1 3 7 9 12 13 14 15
0:1 * *
12:13:14:15 * * * *
3:7 * *
9:13 * *
0:1 0 0 0 -
12:13:14:15 1 1 - -
3:7 0 - 1 1
9:13 1 - 0 1
y <= (not x3 and not x2 and not x1) or
(x3 and x2) or
(not x3 and x1 and x0) or
(x3 and not x1 and x0);
y <= not(
(x3 or x2 or x1) and
(not x3 or not x2) and
(x3 or not x1 or not x0) and
(not x3 or x1 or not x0));
library ieee;
use ieee.std_logic_1164.all;
entity quine20240218 is
port (
x3, x2, x1, x0: in std_logic;
y: out std_logic
);
end;
architecture behaviour of quine20240218 is
begin
y <= (not x3 and not x2 and not x1) or
(x3 and x2) or
(not x3 and x1 and x0) or
(x3 and not x1 and x0);
end;
library ieee;
use ieee.std_logic_1164.all;
entity quine20240218testbench is
port (
x3, x2, x1, x0: inout std_logic;
y: out std_logic
);
end;
architecture behaviour of quine20240218testbench is
component quine20240218
port (
x3, x2, x1, x0: in std_logic;
y: out std_logic
);
end component;
begin
q: quine20240218 PORT MAP (x3=>x3, x2=>x2, x1=>x1, x0=>x0, y=>y);
library ieee;
use ieee.std_logic_1164.all;
entity quine20240218 is
port (
x3, x2, x1, x0: in std_logic;
y: out std_logic
);
end;
architecture behaviour of quine20240218 is
begin
y <= (not x3 and not x2 and not x1) or
(x3 and x2) or
(not x3 and x1 and x0) or
(x3 and not x1 and x0);
end;
library ieee;
use ieee.std_logic_1164.all;
entity quine20240218testbench is
port (
x3, x2, x1, x0: inout std_logic;
y: out std_logic
);
end;
architecture behaviour of quine20240218testbench is
component quine20240218
port (
x3, x2, x1, x0: in std_logic;
y: out std_logic
);
end component;
begin
q: quine20240218 PORT MAP (x3=>x3, x2=>x2, x1=>x1, x0=>x0, y=>y);
x0 <= '0' after 0 ns, '1' after 10 ns, '0' after 20 ns, '1' after 30 ns, '0' after 40 ns, '1' after 50 ns, '0' after 60 ns, '1' after 70 ns, '0' after 80 ns, '1' after 90 ns, '0' after 100 ns, '1' after 110 ns, '0' after 120 ns, '1' after 130 ns, '0' after 140 ns, '1' after 150 ns;
x1 <= '0' after 0 ns, '0' after 10 ns, '1' after 20 ns, '1' after 30 ns, '0' after 40 ns, '0' after 50 ns, '1' after 60 ns, '1' after 70 ns, '0' after 80 ns, '0' after 90 ns, '1' after 100 ns, '1' after 110 ns, '0' after 120 ns, '0' after 130 ns, '1' after 140 ns, '1' after 150 ns;
x2 <= '0' after 0 ns, '0' after 10 ns, '0' after 20 ns, '0' after 30 ns, '1' after 40 ns, '1' after 50 ns, '1' after 60 ns, '1' after 70 ns, '0' after 80 ns, '0' after 90 ns, '0' after 100 ns, '0' after 110 ns, '1' after 120 ns, '1' after 130 ns, '1' after 140 ns, '1' after 150 ns;
x3 <= '0' after 0 ns, '0' after 10 ns, '0' after 20 ns, '0' after 30 ns, '0' after 40 ns, '0' after 50 ns, '0' after 60 ns, '0' after 70 ns, '1' after 80 ns, '1' after 90 ns, '1' after 100 ns, '1' after 110 ns, '1' after 120 ns, '1' after 130 ns, '1' after 140 ns, '1' after 150 ns;
end;